This Broad Agency Announcement (BAA) solicits pilot project chiplet designs for state-of-the-art microelectronics and composable systems. The Department of War (DoW) aims to develop enduring, secure, interoperable, and reusable chiplet architectures for high-demand mission areas. The process involves a two-step solicitation: Step 1 requires white paper submissions by July 23, 2026, 5:00 PM ET. Questions are due by July 15, 2026. Step 2 will involve full proposals from selected offerors. Awards may be FAR-based contracts or Other Transaction Agreements. Offerors will not be reimbursed for proposal costs. Classified work requires prior notification and facility accreditation.
White papers are due by July 23, 2026, at 5:00 PM Eastern Time. Full proposals will be requested later for selected offerors.
White papers will be evaluated based on technical merit, feasibility, alignment with government requirements, and cost-price. Key technical criteria include the breadth and depth of secure enclave testing, technical maturity, soundness, interoperability, transition potential, applicability to broad USG challenges, and facilitation of SOTA adoption.
Offerors must submit a white paper detailing their proposed chiplet design, contractor SOW, alignment with DoD mission needs, potential DoD programs of record, projected demand, interaction plan with Intel, technical approach, transition strategy, and deliverables. A cost estimate and contract response are also required.
White papers may be deemed ot selectable if they contain significant technical flaws, lack alignment with objectives, have disproportionate cost estimates, or assert data rights restrictions that undermine the transition strategy.
